Verilog by Example - Readler

Verilog by Example

R$ 125,80
Ir Para Loja
Ano 2011Páginas 124Formato BOOKISBN 9780983497301

Sobre o livro

A practical primer for the student and practicing engineer already familiar with the basics of digital design, the reference develops a working grasp of the verilog hardware description language step-by-step using easy-to-understand examples. Starting with a simple but workable design sample, increasingly more complex fundamentals of the language are introduced until all major features of verilog are brought to light. Included in the coverage are state machines, modular design, FPGA-based memories, clock management, specialized I/O, and an introduction to techniques of simulation. The goal is to prepare the reader to design real-world FPGA solutions. All the sample code used in the book is available online. What Strunk and White did for the English language with "The Elements of Style," VERILOG BY EXAMPLE does for FPGA design.

Ficha técnica

Autor
Readler, Blaine, Blaine Readler
Editora
UmLivro
Formato
BOOK
Encadernação
Capa comum
ISBN
9780983497301
EAN
9780983497301
Ano de Publicação
2011
Número de Páginas
124
Dimensões
22.9 x 15.2 x 3 cm
Peso
0.19 kg
Idioma
pt-BR
Edição
1
SKU
9780983497301

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